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Freescale Semiconductor Data Sheet: Technical Data
Document Number: MC9RS08LE4 Rev. 2, 11/2008
MC9RS08LE4
TBD MC9RS08LE4
Features: * 8-Bit RS08 Central Processor Unit (CPU) - Up to 20 MHz CPU at 2.7 V to 5.5 V across temperature range of -40C to 85C - Subset of HC08 instruction set with added BGND instructions * On-Chip Memory - 4 KB flash memory read/program/erase over full operating voltage and temperature - 256-byte random-access memory (RAM) - Security circuitry to prevent unauthorized access to flash memory contents * Power-Saving Modes - Wait and stop * Clock Source Options - Oscillator (XOSC) -- Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 39.0625 kHz or 1 MHz to 20 MHz - Internal Clock Source (ICS) -- Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supports bus frequencies up to 10 MHz * System Protection - Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock - Low-voltage detection with reset or interrupt - Selectable trip points - Illegal opcode detection with reset - Illegal address detection with reset - Flash memory block protection * Development Support - Single-wire background debug interface - Breakpoint capability to allow single breakpoint setting during in-circuit debugging * Peripherals - LCD -- Up to 8 x 14 or 4 x 18 segments; compatible with 5 V or 3 V LCD glass displays using on-chip resistor bias network; functional in wait, stop modes for very low power LCD operation; frontplane and backplane pins multiplexed with GPIO functions; selectable frontplane and backplane configurations - ADC -- 8-channel, 10-bit resolution; 2.5 s conversion time; automatic compare function; 1.7 mV/C temperature sensor; internal bandgap reference channel; operation in stop; fully functional from 2.7 V to 5.5 V. - TPM -- Two 2-channel 16-bit timer/pulse-width modulator (TPM) modules; selectable input capture, output compare, or buffered edge- or center-aligned PWM on each channel - SCI -- One serial communications interface module with optional 13-bit break; LIN extensions - KBI -- 8-pin keyborad interrupt module * Input/Output - 26 GPIOs including 1 output-only pin and 1 input-only pin - Hysteresis and configurable pullup device on all input pins; configurable slew rate and drive strength on all output pins * Package Options - 28-pin SOIC
28 W-SOIC Case 751F
This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. (c) Freescale Semiconductor, Inc., 2008. All rights reserved.
Table of Contents
1 2 3 MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . .5 3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .6 3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .6 3.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . . .7 3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .14 3.8 External Oscillator (XOSC) Characteristics . . . . . . . . . 3.9 Internal Clock Source (ICS) Characteristics . . . . . . . . 3.10 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.2 TPM Module Timing . . . . . . . . . . . . . . . . . . . . . 3.11 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3.12 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 17 17 17 18 19 21 23 24
4 5
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision 1 2 Date 10/6/2008 11/3/2008 Initial public release. In Table 8, updated the WIDD, added the maximum of RIDD and SIDD at 5 V and deleted RTI adder from stop with 32.768 kHz crystal external clock source reference enabled. Added maximum of IOLT in Table 7. Description of Changes
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual
(MC9RS08LE4RM) Contains extensive product information including modes of operation, memory, resets and interrupts, register definition, port pins, CPU, and all module information.
MC9RS08LE4 MCU Data Sheet, Rev. 2 2 Freescale Semiconductor
1
VDD VSS
MCU Block Diagram
VREFH VREFL VDDAD VSSAD 8-CH 10-BIT ANALOG-TO-DIGITAL CONVERTER(ADC) 8-BIT KEYBOARD INTERRUPT(KBI) RS08 CORE SERIAL COMMUNICATION INTERFACE (SCI) CPU BDC 2-CH TIMER/PWM MODULE (TPM2) RS08 SYSTEM CONTROL RESETS AND INTERRUPTS MODES OF OPERATION POWER MANAGEMENT COP WAKEUP VPP RTI LVD RESET
TxD RxD
The block diagram, Figure 1, shows the structure of the MC9RS08LE4 MCU.
ADP[7:0]
PTA0/RxD/LCD15 PTA1/TxD/LCD14
KBIP[0:7]
PTA2/TPM2CH1/LCD13
PORT A
PTA3/TPM2CH0/LCD12 PTA4/KBIP0/LCD11 PTA5/KBIP1/LCD10 PTA6/KBIP2/LCD9 PTA7/KBIP3/LCD8 PTB0/TCLK/RESET/VPP PTB1/BKGD/MS
TPM2CH0 TPM2CH1 TCLK
2-CH TIMER/PWM MODULE (TPM1)
TPM1CH0 TPM1CH1 TCLK
PORT B
PTB2/ADP0/LCD21 PTB3/ADP1/LCD20 PTB4/ADP2/LCD19 PTB5/ADP3/LCD18
USER FLASH 4,096 BYTES USER RAM 256 BYTES 20 MHz INTERNAL CLOCK SOURCE (ICS) LOW-POWER OSCILLATOR 31.25 kHz to 39.0625 kHz 1 MHz to 20 MHz (XOSC) LCD[8:15] XTAL EXTAL
PTB6/TPM1CH0/LCD17 PTB7/TPM1CH1/LCD16
PORT C
PTC0/EXTAL PTC1/XTAL PTD0/KBIP4/LCD0 PTD1/KBIP5/LCD1
PORT D
PTD2/KBIP6/LCD2 PTD3/KBIP7/LCD3 PTD4/ADP4/LCD4 PTD5/ADP5/LCD5
VDD VSS VOLTAGE REGULATOR
VLL3
LIQUID CRYSTAL DISPLAY DRIVER (LCD)
LCD[16:21]
LCD[0:7]
PTD6/ADP6/LCD6 PTD7/ADP7/LCD7
NOTES: 1. PTB0/TCLK/RESET/VPP is an input-only pin when used as port pin 2. PTB1/BKGD/MS is an output-only pin
Figure 1. MC9RS08LE4 Block Diagram
2
Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08LE4.
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 3
Table 2-1. Pin Availability by Package Pin-Count
Pin Number 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PTC0 PTC1 PTB0 PTB1 PTB2 PTB3 PTB4 PTB5 PTB6 PTB7 PTA0 PTA1 PTA2 PTA3 PTA4 PTA5 PTA6 PTA7 PTD7 PTD6 PTD5 PTD4 TCLK EXTAL XTAL RESET BKGD ADP0 ADP1 ADP2 ADP3 TPM1CH0 TPM1CH1 RxD TxD TPM2CH1 TPM2CH0 KBIP0 KBIP1 KBIP2 KBIP3 ADP7 ADP6 ADP5 ADP4 VPP MS LCD21 LCD20 LCD19 LCD18 LCD17 LCD16 LCD15 LCD14 LCD13 LCD12 LCD11 LCD10 LCD9 LCD8 LCD7 LCD6 LCD5 LCD4 Port Pin PTD3 PTD2 PTD1 PTD0 <-- Lowest Priority Alt 1 --> Highest Alt 2 KBIP7 KBIP6 KBIP5 KBIP4 Alt 3 LCD3 LCD2 LCD1 LCD0 VDD VSS
MC9RS08LE4 MCU Data Sheet, Rev. 2 4 Freescale Semiconductor
Introduction
PTD3/KBIP7/LCD3 PTD2/KBIP6/LCD2 PTD1/KBIP5/LCD1 PTD0/KBIP4/LCD0 VDD VSS PTC0/EXTAL PTC1/XTAL PTB0/TCLK/RESET/VPP PTB1/BKGD/MS PTB2/ADP0/LCD21 PTB3/ADP1/LCD20 PTB4/ADP2/LCD19 PTB5/ADP3/LCD18
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
PTD4/ADP4/LCD4 PTD5/ADP5/LCD5 PTD6/ADP6/LCD6 PTD7/ADP7/LCD7 PTA7/KBIP3/LCD8 PTA6/KBIP2/LCD9 PTA5/KBIP1/LCD10 PTA4/KBIP0/LCD11 PTA3/TPM2CH0/LCD12 PTA2/TPM2CH1/LCD13 PTA1/TxD/LCD14 PTA0/RxD/LCD15 PTB7/TPM1CH1/LCD16 PTB6/TPM1CH0/LCD17
Figure 2. MC9RS08LE4 in 28-Pin SOIC Package
3
3.1
Electrical Characteristics
Introduction
This section contains electrical and timing specifications for the MC9RS08LE4 microcontroller available at the time of publication.
3.2
Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate:
Table 2. Parameter Classifications
P C Those parameters are guaranteed during production testing on each individual device. Those parameters are achieved by the design characterization by measuring a statistically relevant sample size across process variations. Those parameters are achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. All values shown in the typical column are within this category. Those parameters are derived mainly from simulations.
T
D
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 5
Absolute Maximum Ratings
NOTE The classification is shown in the column labeled "C" in the parameter tables where appropriate.
3.3
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent damage to the device. For functional operating conditions, refer to the remaining tables in this chapter. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD) or the programmable pull-up resistor associated with the pin is enabled.
Table 3. Absolute Maximum Ratings
Rating Supply voltage Maximum current into VDD Digital input voltage Instantaneous maximum current Single pin limit (applies to all port pins)1, 2, 3 Storage temperature range
1
Symbol VDD IDD VIn ID Tstg
Value 2.7 to 5.5 120 -0.3 to VDD + 0.3 25 -55 to 150
Unit V mA V mA C
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally clamped to V SS and VDD except the RESET/VPP pin which is internally clamped to VSS only. 3 Power supply must maintain regulation within operating V DD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.
3.4
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the MCU design. In order to take PI/O into account in power calculations, determine the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small.
MC9RS08LE4 MCU Data Sheet, Rev. 2 6 Freescale Semiconductor
ESD Protection and Latch-Up Immunity
Table 4. Thermal Characteristics
Rating Operating temperature range (packaged) Maximum junction temperature Thermal resistance Single layer board 28-pin SOIC Symbol TA TJMAX JA Value TL to TH -40 to 85 105 70 Unit C C C/W
The average chip-junction temperature (TJ) in C can be obtained from:
TJ = TA + (PD x JA) Eqn. 1
where: TA = Ambient temperature, C JA = Package thermal resistance, junction-to-ambient, C /W PD = Pint + PI/O Pint = IDD x VDD, Watts chip internal power PI/O = Power dissipation on input and output pins user determined For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ (if PI/O is neglected) is:
PD = K / (TJ + 273C) Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD x (TA + 273C) + JAx (PD)2 Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving equations 1 and 2 iteratively for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge. Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage. All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During the device qualification ESD stresses were performed for the human body model (HBM), the machine model (MM) and the charge device model (CDM). A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 7
DC Characteristics
specification at room temperature followed by hot temperature, unless specified otherwise in the device specification.
Table 5. ESD and Latch-up Test Conditions Model
Human Body
Description
Series resistance Storage capacitance Number of pulses per pin Series resistance
Symbol
R1 C -- R1 C -- -- --
Value
1500 100 3 0 200 3 -2.5 7.5
Unit
pF -- pF -- V V
Machine
Storage capacitance Number of pulses per pin Minimum input voltage limit
Latch-up Maximum input voltage limit
Table 6. ESD and Latch-Up Protection Characteristics No.
1 2 3 4
1
Rating1
Human body model (HBM) Machine model (MM) Charge device model (CDM) Latch-up current at TA = 85C Latch-up current at TA = 85C
Symbol
VHBM VMM VCDM ILAT ILAT
Min
2000 200 500 1002 753
Max
-- -- -- -- --
Unit
V V V mA mA
Parameter is achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. 2 These pins meet JESD78A Class II (section 1.2) Level A (section 1.3) requirement of 100 mA. 3 This pin meets JESD78A Class II (section 1.2) Level B (section 1.3) characterization to 75 mA.
3.6
DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power supply current in various operating modes.
Table 7. DC Characteristics (Temperature Range = -40 to 85C Ambient)
Num 1 2 3 4 5 C P C C Power on RESET (POR) voltage Input high voltage (VDD > 2.3V) (all digital inputs) Input high voltage (1.8 V VDD 2.3 V) (all digital inputs) VIH C Parameter Supply voltage (run, wait and stop modes.) 0 < fBus <10MHz Minimum RAM retention supply voltage applied to VDD Low-voltage Detection threshold (VDD falling) (VDD rising) VLVD VPOR 1.80 1.88 0.9 0.70 x VDD 0.85 x VDD 1.86 1.94 -- -- -- 1.95 2.03 1.7 -- -- V V V V Symbol VDD VRAM Min 2.7 0.81 Typical -- -- Max 5.5 -- Unit -- V
MC9RS08LE4 MCU Data Sheet, Rev. 2 8 Freescale Semiconductor
DC Characteristics
Table 7. DC Characteristics (Temperature Range = -40 to 85C Ambient) (continued)
Num C Parameter Input low voltage (VDD > 2.3 V) (all digital inputs) 6 C Input low voltage (1.8 V VDD 2.3 V) (all digital inputs) 7 8 9 10 C P P P Input hysteresis (all digital inputs) Input leakage current (per pin) VIn = VDD or VSS, all input only pins High impedance (off-state) leakage current (per pin) VIn = VDD or VSS, all input/output Internal pullup/pulldown resistors2(all port pins) Output high voltage (port A) IOH = -5 mA (VDD 4.5 V) IOH = -3 mA (VDD 3 V) IOH = -2 mA (VDD 1.8 V) 12 C Maximum total IOH for all port pins Output low voltage (port A) IOL = 5 mA (VDD 4.5 V) IOL = 3 mA (VDD 3 V) IOL = 2 mA (VDD 1.8 V) 14 15 16
1 2 3 4 5 6
Symbol
Min --
Typical -- -- -- 0.025 0.025 45
Max 0.30 x VDD 0.30 x VDD -- 1.0 1.0 65
Unit V V V A A k
VIL Vhys |IIn| |IOZ| RPU
-- 0.06 x VDD -- -- 20
11
C
VOH
VDD - 0.8
-- -- -- --
-- -- -- 40
V
|IOHT|
--
mA
13
C
VOL
-- -- -- --
-- -- -- --
0.8 0.8 0.8 100
V
C C C
Maximum total IOL for all port pins dc injection current3, 4, 5 ,6 VIn < VSS, VIn > VDD Single pin limit Total MCU limit, includes sum of all stressed pins Input capacitance (all non-supply pins)
IOLT -- CIn
mA
-- -- --
-- -- --
0.2 0.8 7
mA mA pF
This parameter is characterized and not tested on each device. Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown. All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP which is internally clamped to VSS only Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use the larger of the two values. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use the larger of the two values. This parameter is characterized and not tested on each device.
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 9
DC Characteristics
Typical IOH vs. VOH (VDD = 5 V)
5 4.9 4.8 VOH(V) 4.7 4.6 4.5 4.4 -15 -10 IOH(mA)
Figure 3. Typical IOH vs. VOH (VDD = 5 V)
-40C 25C 85C
-5
0
Typical IOH vs. VOH (VDD = 3 V)
3.5 3 2.5 VOH(V) 2 1.5 1 0.5 0 -14 -12 -10 -8 -6 -4 -2 0 IOH(mA)
Figure 4. Typical IOH vs. VOH (VDD = 3 V)
-40C 25C 85C
MC9RS08LE4 MCU Data Sheet, Rev. 2 10 Freescale Semiconductor
DC Characteristics
Typical IOL vs. VOL (VDD = 5 V)
600 500 VOL(mV) 400 300 200 100 0 0 5 IOL(mA)
Figure 5. Typical IOL vs. VOL (VDD = 5 V)
-40C 25C 85C
10
15
Typical IOL vs. VOL (VDD = 3 V)
1200 1000 VOL(mV) 800 600 400 200 0 0 5 IOL(mA)
Figure 6. Typical IOL vs. VOL (VDD = 3 V)
-40C 25C 85C
10
15
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 11
DC Characteristics
Typical VOH vs. VDD (IOH = 2 mA)
6 5 VOH(V) 4 3 2 1 0 0 1 2 3 VDD(V)
Figure 7. Typical VOH vs. VDD (IOH = 2 mA)
-40C 25C 85C
4
5
6
Typical VOL vs. VDD (IOL = 2 mA)
250 200 150 100 50 0 0 1 2 3 VDD(V)
Figure 8. Typical VOL vs. VDD (IOL = 2 mA)
-40C 25C 85C
VOL(mV)
4
5
6
MC9RS08LE4 MCU Data Sheet, Rev. 2 12 Freescale Semiconductor
DC Characteristics
Typical Pullup Resistor
45 44 43 42 41 40 39 38 37 0 1 2 3 VDD(V)
Figure 9. Typical Pullup Resistor
Pullup Resistor(kohm)
-40C 25C 85C
4
5
6
Typical Pulldown Resistor
Pulldown Resistor(kohm) 45 44 43 42 41 40 39 38 37 36 0 1 2 3 VDD(V)
Figure 10. Typical Pulldown Resistor
-40C 25C 85C
4
5
6
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 13
Supply Current Characteristics
3.7
Num
Supply Current Characteristics
Table 8. Supply Current Characteristics
C Parameter Symbol Bus Freq. (MHz) VDD (V) 5 10 C 3 Run supply current2 T 1.25 T 3 5 2 T 3 Wait supply current2 T 1 T 3 WIDD 5 RIDD 5 Temp. (C) -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 -40 25 85 Typical 3.78 3.81 3.83 3.70 3.76 3.77 0.94 0.95 0.95 0.94 0.94 0.94 932 943 947 940 959 954 712 714 717 718 716 715 1.14 1.43 3.75 0.61 0.88 2.96 119.85 128.72 131.70 115.28 123.86 126.60 0.10 0.11 0.12 0.11 0.11 0.12 Max1 Unit
P
20
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 15 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- A mA
1
T
2
A
P 3 C Stop mode supply current SIDD
--
5
--
3
T 4 T ADC adder to stop3 --
--
5
A
--
3
T 5 T
RTI adder from stop with 1 kHz clock source enabled4
-- -- --
5
A
3
MC9RS08LE4 MCU Data Sheet, Rev. 2 14 Freescale Semiconductor
Supply Current Characteristics
Table 8. Supply Current Characteristics (continued)
Num C Parameter Symbol Bus Freq. (MHz) -- -- -- 3 VDD (V) 5 Temp. (C) -40 25 85 -40 25 85 Typical 69.40 72.07 73.29 69.74 72.19 72.67 Max1 -- -- -- -- -- -- Unit
T 6 T
1
LVI adder from stop (LVDE = 1 and LVDSE = 1)
A
Maximum value is measured at the nominal VDD voltage times 10% tolerance. Values given here are preliminary estimates prior to completing characterization 2 Does not include any dc loads on port pins 3 Required asynchronous ADC clock and LVD to be enabled. 4 Most customers are expecteed to find that auto-wakeup from stop can be used instead of the higher current wait mode.
Typical RIDD vs VDD (FEI, BusFreq. = 10 MHz)
4.5
4
RIDD(mA)
3.5
3
-40C 25C 85C
2.5
2 0 1 2 3 VDD(V)
Figure 11. Typical RIDD vs. VDD (FEI, BusFreq. = 10 MHz)
4
5
6
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 15
External Oscillator (XOSC) Characteristics
3.8
External Oscillator (XOSC) Characteristics
Table 9. External Oscillator Specifications (Temperature Range = -40 to 85C Ambient)
Refer to Figure 12 for crystal or resonator circuit.
Num
C
Characteristic Oscillator crystal or resonator (EREFS = 1) Low range, ( IREFS = x) High range, FLL bypassed external (CLKS = 10, IREFS = x) High range, FLL engaged external (CLKS = 00, IREFS = 0) Load capacitors Feedback resistor Low range (32 kHz to 100 kHz) High range (1 MHz to 16 MHz) Series resistor Low range Low Gain (HGO = 0) High Gain (HGO = 1) High range Low Gain (HGO = 0) High Gain (HGO = 1) 8 MHz 4 MHz 1 MHz Crystal start-up time 3, 4 Low range High range
Symbol
Min
Typical1
Max
Unit
1
D
flo fhi_byp fhi_eng C1 C2 RF
32 1 1
-- -- -- See Note 2 10 1
38.4 5 5
kHz MHz MHz
2 3
D D
M
-- -- RS -- -- -- --
t CSTL t CSTH
0 100 0 0 10 20 500 4
-- -- k -- -- -- -- -- -- ms
4
D
5
1 2
D
-- --
Data in Typical column was characterized at 3.0 V, 25 C or is typical recommended value. See crystal or resonator manufacturer's recommendation. 3 This parameter is characterized and not tested on each device. 4 Proper PC board layout procedures must be followed to achieve specifications.
XOSC EXTAL XTAL RS
RF
C1
Crystal or Resonator C2
Figure 12. Typical Crystal or Resonator Circuit
MC9RS08LE4 MCU Data Sheet, Rev. 2 16 Freescale Semiconductor
Internal Clock Source (ICS) Characteristics
3.9
Num 1 2 3 4 5 6 7 8 9
1
Internal Clock Source (ICS) Characteristics
Table 10. ICS Frequency Specifications (Temperature Range = -40 to 85C Ambient)
C C C C C C C C C C Characteristic Square wave input clock frequency (EREFS = 0) FLL bypass external (CLKS = 10) FLL engaged external (CLKS = 00) Average internal reference frequency - untrimmed Average internal reference frequency - trimmed DCO output frequency range -- untrimmed DCO output frequency range -- trimmed Resolution of trimmed DCO output frequency at fixed voltage and temperature Total deviation of trimmed DCO output frequency over voltage and temperature FLL acquisition time 3,2 Long term Jitter of DCO output clock (averaged over 2 ms interval)
3
Symbol fextal fint_ut fint_t fdco_ut fdco_t fdco_res_t fdco_t tacquire CJitter
Min 0 0.03125 25 31.25 12.8 16 -- -- -- --
Typical1 -- -- 31.25 31.25 16 16 -- -- -- --
Max 20 5 41.66 39.0625 21.33 20 0.2 2 1 0.6
Unit MHz kHz kHz MHz MHz %fdco %fdco ms %fdco
Data in Typical column was characterized at 3.0 V, 25 C or is typical recommended value. This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running. 3 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f BUS. Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a given interval.
2
3.10
AC Characteristics
This section describes AC timing characteristics for each peripheral system.
3.10.1
Num 1 2 3 4 5 6
Control Timing
Table 11. Control Timing
C D D D D D C Parameter Bus frequency (tcyc = 1/fBus) Real time interrupt internal oscillator period External RESET pulse KBI pulse width2 stop1 pF)3 width1 Symbol fBus tRTI textrst tKBIPW tKBIPWS tRise, tFall Min 0 700 150 1.5 tcyc 100 -- -- Typical -- 1000 -- -- -- 11 35 Max 10 1300 -- -- -- -- -- Unit MHz s ns ns ns ns
KBI pulse width in
Port rise and fall time (load = 50 Slew rate control disabled (PTxSE = 0) Slew rate control enabled (PTxSE = 1)
1
This is the shortest pulse that is guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be recognized.
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 17
AC Characteristics
2
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 3 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range -40 C to 85 C.
textrst RESET
Figure 13. Reset Timing
tKBIPWS tKBIPW KBI Pin (rising or high level)
KBI Pin (falling or low level) tKBIPW tKBIPWS
Figure 14. KBI Pulse Width
3.10.2
TPM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the optional external source to the timer counter. These synchronizers operate from the current bus rate clock.
Table 12. TPM/MTIM Input Timing
Num 1 2 3 4 5 D D D D D C Function External clock frequency External clock period External clock high time External clock low time Input capture pulse width Symbol fTCLK tTCLK tclkh tclkl fICPW
tTCLK tclkh
Min 0 4 1.5 1.5 1.5
Max fBus1/4 -- -- -- --
Unit MHz tCYC tCYC tCYC tCYC
TCLK tclkl
Figure 15. Timer External Clock
MC9RS08LE4 MCU Data Sheet, Rev. 2 18 Freescale Semiconductor
ADC Characteristics
tICPW TPMCHn
TPMCHn tICPW
Figure 16. Timer Input Capture Pulse
3.11
ADC Characteristics
Figure 17. 5 Volt 10-bit ADC Operating Conditions
Characteristic Conditions Absolute Symb VDDAD VDDAD VSSAD VREFH VREFL VADIN CADIN RADIN 10 bit mode fADCK > 4MHz fADCK < 4MHz 8 bit mode (all valid fADCK) Min 1.8 -100 -100 1.8 VSSAD VREFL -- -- -- -- -- 0.4 fADCK 0.4 Typical1 -- 0 0 VDDAD VSSAD -- 4.5 3 -- -- -- -- -- Max 5.5 100 100 VDDAD VSSAD VREFH 5.5 5 5 10 10 8.0 MHz 4.0 Unit V mV mV V V V pF k
Supply voltage Ground voltage Reference voltage high Reference voltage low Input voltage Input capacitance Input resistance
Delta to VDD (VDD - VDDAD)2 Delta to VSS (VSS - VSSAD)2
Analog source resistance external to MCU
RAS
k
ADC conversion clock frequency
1
High speed (ADLPC = 0) Low power (ADLPC = 1)
Typical values assume VDDAD = 5.0 V, Temp = 25 C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 2 DC potential difference.
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 19
ADC Characteristics
SIMPLIFIED INPUT PIN EQUIVALENT CIRCUIT ZAS RAS VADIN VAS Pad leakage due to input protection
ZADIN SIMPLIFIED CHANNEL SELECT CIRCUIT RADIN
ADC SAR ENGINE
+ -
+ -
CAS
RADIN INPUT PIN
RADIN
INPUT PIN
RADIN CADIN
INPUT PIN
Figure 18. ADC Input Impedance Equivalency Diagram Table 13. 10-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD)
Nu m C Characteristic Supply current ADLPC=1 ADLSMP=1 ADCO=1 Supply current ADLPC=1 ADLSMP=0 ADCO=1 Supply current ADLPC=0 ADLSMP=1 ADCO=1 Supply current ADLPC=0 ADLSMP=0 ADCO=1 Supply current P ADC asynchronous clock source Conditions Symb Min Typical1 Max Unit
1
T
IDDAD
--
133
--
A
2
T
IDDAD
--
218
--
A
3
T
IDDAD
--
327
--
A
4
P
VDDAD 5.5 V
IDDAD
--
0.582
1
mA
5 6
Stop, reset, module off High speed (ADLPC = 0) Low power (ADLPC = 1)
IDDAD fADACK
-- 2 1.25
0.011 3.3 2
1 5
A MHz
3.3
MC9RS08LE4 MCU Data Sheet, Rev. 2 20 Freescale Semiconductor
Flash Specifications
Table 13. 10-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD) (continued)
Nu m C Characteristic Conversion time (Including sample time) Sample time Long sample (ADLSMP = 1) 9 P Total unadjusted error 10-bit mode 8-bit mode 10-bit mode 10 P Differential non-linearity DNL 8-bit mode -- ETUE Conditions Short sample (ADLSMP = 0) Long sample (ADLSMP = 1) Short sample (ADLSMP = 0) 8 P tADS tADC Symb Min -- -- -- -- -- -- -- Typical1 20 40 3.5 23.5 1 0.5 0.5 0.3 Max -- -- -- -- 2.5 1.0 1.0 0.5 LSB2 Unit
7
P
ADCK cycles ADCK cycles
LSB2
Monotonicity and no-missing-codes guaranteed 11 C Integral non-linearity 10-bit mode INL 8-bit mode 10-bit mode 12 P Zero-scale error 8-bit mode 13 P Full-scale error VADIN = VDDA Quantization error Input leakage error pad leakage3 * RAS 10-bit mode 8-bit mode 10-bit mode 8-bit mode 10 bit mode 8 bit mode EIL EQ EFS EZS -- -- -- -- -- -- -- -- -- -- 0.5 0.3 0.5 0.5 0.5 0.5 -- -- 0.2 0.1 1.0 0.5 1.5 0.5 1.5 0.5 0.5 0.5 2.5 1 LSB2 LSB2
LSB2
LSB2
14
D
LSB2
15
D
Typical values assume VDDAD = 5.0 V, Temp = 25 C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 2 1 LSB = (VREFH - VREFL)/2N 3 Based on input pad leakage current. Refer to pad electrical.
1
3.12
Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash memory. For detailed information about program/erase operations, see the reference manual.
Table 14. Flash Characteristics
Num 1 2 C D D Characteristic Supply voltage for program/erase Program/Erase voltage Symbol VDD VPP Min 2.7 11.8 Typical1 -- 12 Max 5.5 12.2 Unit V V
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 21
Flash Specifications
Table 14. Flash Characteristics (continued)
Num 3 C C VPP current Program Mass erase Supply voltage for read operation 0 < fBus < 10 MHz Byte program time Mass erase time Cumulative program HV time2 Total cumulative HV time (total of tme & thv applied to device) HVEN to program setup time PGM/MASS to HVEN setup time HVEN hold time for PGM HVEN hold time for MASS VPP to PGM/MASS setup time HVEN to VPP hold time VPP rise time3 Recovery time Program/erase endurance TL to TH = -40C to 85C Data retention Characteristic Symbol IVPP_prog IVPP_erase VRead tprog tme thv thv_total tpgs tnvs tnvh tnvh1 tvps tvph tvrs trcv -- tD_ret Min -- -- 1.8 20 500 -- -- 10 5 5 100 20 20 200 1 1000 100 Typical1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max 200 100 5.5 40 -- 8 2 -- -- -- -- -- -- -- -- -- -- Unit A A V s ms ms hours s s s s ns ns ns s cycles years
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
1 2
D P P C C D D D D D D D D D C
Typicals are measured at 25 C. thv is the cumulative high voltage programming time to the same row before next erase. Same address can not be programmed more than twice before next erase. 3 Fast V PP rise time may potentially trigger the ESD protection structure, which may result in over-current flowing into the pad and cause permanent damage to the pad. External filtering for the VPP power source is recommended. An example VPP filter is shown in Figure 19.
Figure 19. Example VPP Filtering
MC9RS08LE4 MCU Data Sheet, Rev. 2 22 Freescale Semiconductor
Flash Specifications
tprog WRITE DATA1 tpgs
Data Next Data
PGM tnvs HVEN trs VPP2 tnvh trcv
tvps thv
tvph
1 2
Next Data applies if programming multiple bytes in a single row, refer to MC9RS08LE4 Reference Manual. VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 20. Flash Program Timing
tme trcv MASS tnvs HVEN trs VPP1
1
tnvh1
tvps
tvph
VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 21. Flash Mass Erase Timing
4
Ordering Information
This section contains ordering numbers for MC9RS08LE4 devices. See below for an example of the device numbering system.
MC9RS08LE4 MCU Data Sheet, Rev. 2 Freescale Semiconductor 23
Flash Specifications
Table 15. Device Numbering System
Memory Device Number Flash MC9RS08LE4 4 KB RAM 256 bytes Type 28 SOIC Designator PC Document No. 98ASB42345B Package
MC 9 RS08 LE 4 C XX Status (MC = Fully qualified) Memory (9 = Flash-based) Core Family Package designator (See Table 15) Temperature range (C = -40C to 85C) Approximate memory size (in KB)
5
Mechanical Drawings
This following pages contain mechanical specifications for MC9RS08LE4 package options. * 28-pin SOIC (small outline integrated circuit)
MC9RS08LE4 MCU Data Sheet, Rev. 2 24 Freescale Semiconductor
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Document Number: MC9RS08LE4 Rev. 2 11/2008

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